Low-overhead XOR Multi-PUF against machine learning attacks

Abstract

Physical unclonable functions (PUF) have been a hot research topic in hardware security in recent years. Still, most of the research has not focused on the design of balancing its resistance to machine learning attacks with resources. Therefore, in this paper, a new low-overhead XOR Multi-PUF design is proposed, which achieves the response of outputting different modes of PUFs with configurable bits to change the number of delays and inverters inside the circuit, completing the PUF design with less hardware overhead. It also introduces an input challenge obfuscation mechanism to improve its resistance to machine learning attacks. In this paper, the proposed PUF circuit design is verified on FPGA boards and good performance metrics are obtained. The design has more challenge-response pairs (CRPs) and less hardware overhead than existing PUF low-overhead designs, improving resistance to machine learning attacks.