Low-noise silicon avalanche photodiodes fabricated in conventional CMOS technologies

Abstract

We present a simple design technique that allows the fabrication of UV/blue-selective avalanche photodiodes in a conventional CMOS process. The photodiodes are fabricated in a twin tub 0.8 /spl mu/m CMOS technology. An efficient guard-ring structure is created using the lateral diffusion of two n-well regions separated by a gap of 0.6 /spl mu/m. When operated at a multiplication gain of 20, our photodiodes achieve a very low dark current of only 400 pA/mm/sup 2/, an excess noise factor F=7 at /spl lambda/=400 nm and a good gain uniformity. At zero bias voltage, the responsivity peaks at /spl lambda/=470 nm, with 180 mA/W. It corresponds to a 50% quantum efficiency. Successive process steps are simulated to provide a comprehensive understanding of this technique.