Low-Latency Low-Complexity Method and Architecture for Computing Arbitrary Nth Root of Complex Numbers

Abstract

This paper presents a new architecture, based on CORDIC and parabolic synthesis methodology, for computing Nth root of a complex number. The proposed architecture uses the pretreatment for normalization and parabolic synthesis method to calculate the Nth root of modulus of the input complex number and performs the conversion between the plane coordinate form and the polar coordinate form of the complex number by CORDIC, which not only ensures the accuracy but also has an ultra-low computation latency. MATLAB simulation result indicates that our proposed method can calculate the Nth root of the complex numbers in the form of fixed-point number with an error of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2.16 \boldsymbol {\times {10^{ - 6}}}$ </tex-math></inline-formula> . Under TSMC 40nm CMOS technology, the report shows that the area consumption is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$27390.72 \boldsymbol {\mu m^{2}}$ </tex-math></inline-formula> at the frequency of 1GHz and the power consumption is 2.3549mW. More importantly, the computation latency of the proposed architecture is only 60.18% of the latest architecture in the same calculation accuracy.