Low-frequency noise characteristics in the MOSFETs processed in 65 nm technology**Project supported by the National Natural Science Foundation of China (Nos. 61574048, 61204112) and the Guangdong Natural Science Foundation (No. 2014A030313656).

Abstract

Low-frequency noise behavior in the MOSFETs processed in 65 nm technology is investigated in this paper. Low-frequency noise for NMOS transistors agrees with McWhorter's theory (carrier number fluctuation), low-frequency noise in the sub-threshold regime agrees with McWhorter's theory for PMOS transistors while it agree with Hooge's theory (carrier mobility fluctuation) in the channel strong inversion regime. According to carrier number fluctuation model, the extracted trap densities near the interface between channel and gate oxide for NMOS and PMOS transistor are 3.94 × 1017 and 3.56 × 1018 cm−3/eV respectively. According to carrier mobility fluctuation model, the extracted average Hooge's parameters are 2.42 × 10−5 and 4 × 10−4. By consideration of BSIM compact model, it is shown that two noise parameters (NOIA and NOIB) can model the intrinsic channel noise. The extracted NOIA and NOIB are constants for PMOS and their values are equal to 3.94 × 1017 cm−3/eV and 9.31 × 10−4 V−1. But for NMOS, NOIA is also a constant while NOIB is inversely proportional to the effective gate voltage. The extracted NOIA and NOIB for NMOS are equal to 3.56 × 1018 cm−3/eV and 1.53 × 10−2 V−1. Good agreement between simulation and experimental results is achieved.