Low-current amplifier using silicon planar transistors

Abstract

The characteristics of silicon planar transistors at low currents are discussed, and it is shown that amplification of currents below 10?11 A can be achieved. To reduce the number of amplifying stages, a pulsing technique is employed which gives considerable enhancement of gain at low levels. Using this technique, an amplifier is described which uses five transistors to obtain an incremental current gain of 2.2 × 108. The amplifier has an input offset current of 8.5 pA, and exhibits a mean drift rate of 0.27 pA/degC over the range 20°C?50°C. It is suitable for use with very high source resistances, and can be made to have a transient response of the order of 1 s.