Abstract
Based on the shifted polynomial basis (SPB), a high efficient bit-parallel multiplier for the field GF ( 2 m ) defined by an equally-spaced trinomial (EST) is proposed. The use of SPB significantly reduces time delay of the proposed multiplier and at the same time Karatsuba method is combined with SPB to decrease space complexity. As a result, with the same time complexity, approximately 3/4 gates of previous multipliers are used in the proposed multiplier.
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