Abstract

Emerging high-speed lookup-intensive applications are demanding ternary content addressable memories (TCAMs) with large word-sizes, which suffer from lower search speeds due to larger match line capacitance. Therefore, low-energy high-performance design techniques are needed, which improve the search speeds of TCAMs without increasing their power consumption. In this paper, we present a cell-level comparison logic and a charge-shared match line scheme. Both schemes reduce search time and energy in TCAMs. Measurement results of the above schemes, implemented in 0.18-mum CMOS technology, show a search time reduction of 42% and 11%, and a search-energy reduction of 25% and 9%, respectively.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.