A low-power ternary content addressable memory (TCAM) with segmented and non-segmented matchlines

Abstract

This paper presents a ternary content-addressable memory (TCAM) cell structure with low capacitance comparison logic and two techniques to reduce power consumption in TCAM. The first technique employs non-segmented match lines (MLs) to reduce match time during search operation and the second technique employs MLs segmentation to reduce power consumption during search operation in ternary content-addressable memories (TCAMs). The TCAM cell contribution to the match-line (ML) capacitance is reduced by 75% or 50% depending on the globally masked bit in search data by using low capacitance comparison logic TCAM cell as compared to the conventional nor-comparison logic TCAM cell. In MLs segmentation technique, the search operation is pipelined by breaking the match-lines into two segments. If the stored words are not matched with the search data in their first segment, then the searching operation is discontinued for the second segment, thus reducing power. In non-segmented MLs technique, the search operation is not pipelined and is carried out for complete data word in TCAM. We have employed these techniques in a 144 X 144-bit TCAM in 1.2 V, 0.13 mum CMOS technology (UMC), illustrating an overall power reduction of 60% in segmented MLs technique and overall match time reduction of 40% in non-segmented technique, compared to a conventional, non-segmented MLs architecture.