LORD SolderBrace™ Wafer Applied Coating for Improved Reliability and Throughput in WLCSP

Abstract

As more manufacturers look to increase the size of Wafer Level Chip Scale Package (WLCSP) dies and also look to decrease the ball pitch, the susceptibility of the die to fail during thermal cycling and drop shock testing increases. The stress conditions introduced during thermal cycling from the mismatches in Coefficients of Thermal Expansion (CTE) lead to solder fatigue. The failure of WLCSPs during drop shock is found at the solder/pad interface. The general solution to address solder fatigue during thermal cycling and solder joint stress at the copper pad interface has been capillary underfilling the chips after chip attachment. To address these issues, a new material from LORD Corporation – SolderBrace™ wafer applied coating, can be used to partially underfill the WLCSP die at the wafer level. This type of technology can be applied using existing equipment and processing techniques making these materials a more cost effective solution. This new material technology has enabled thermal cycling reliability improvements by replacing the final passivation layer with a new low CTE material as the partial underfill. This wafer applied partial underfill material technology has been successfully used to provide increased thermal cycling and drop shock reliability in WLCSPs using a number of different methods that have been previously described. The method to be discussed in this paper is a production process using a screen printed, photo defined polymer system that does not require any in-process post cure.