LOLA SDR: Low Power Low Latency Software Defined Radio for Broadcast Audio Applications

Abstract

This brief proposes a new low power, low latency and low cost reconfigurable architecture for software defined radio. Due to their flexibility and reconfigurability, software defined radios are now massively used as wideband transceivers, channel sounders or network gateways. However, they often struggle to meet the desired requirements in terms of energy consumption and throughput. In this brief, we present a new architecture capable of tackling these challenges, by combining an off-the-shelf generic radio component with a low power microcontroller associated to a Fourier transform coprocessor. To prove the benefit of our approach, after describing the key assets of the architecture, we derive a complete physical layer dedicated to audio broadcast applications. This chain is capable of streaming High Definition audio stream in real time with low power (437mW) and very low latency (854 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{s}$ </tex-math></inline-formula> ). We show that our processing chain can be flawlessly run on our architecture paving the way for larger adoption of a new generation of low power low latency software defined radio architectures.