Logic-Cell-Coverage Technique for Transient Ionizing Radiation Characterization of Microcircuits

Abstract

The LSI digital microcircuit transient radiation testing problem is principally one of defining an adequate set of tests to determine worst-case radiation response. This paper presents a logic-cell coverage (LCC) technique for evaluating microcircuit performance in a transient ionizing radiation environment. The LCC technique guarantees that every logic cell of the circuit has been examined at least once in both the low and the high state during radiation testing. Test set size reductions of two to six orders of magnitude are possible using LCC as opposed to full functional testing. The several steps involved in generating an LCC test set are explained using the Intel 3003 microcircuit as an example.