Abstract

We extend our local capacitance-voltage profiling method for the real-space nanoscale investigation of the SiO2/SiC interface, which is still an issue in the application of SiC to power electronics devices. Our technique is based on time-resolved scanning nonlinear dielectric microscopy and can be used for collecting local capacitance-voltage and its voltage-derivative profiles at each measurement point. This technique can also be combined with local deep level transient spectroscopy for simultaneously imaging the spatial fluctuations of interface defect density in real-space. Here we use the proposed technique to measure SiC wafers with a thermal oxide layer and investigate the effect of interface nitridation. From the data volume obtained by our technique, various images are extracted and their correlation is analyzed to characterize and discuss the spatial fluctuations and hysteresis of the local capacitance-voltage profiles. As expected, the nitridation of the SiO2/SiC interface after thermal oxidation is effective for the reduction of hysteresis and fluctuations in local capacitance-voltage profiles. However, significant spatial fluctuations remain even after the nitridation treatment, which suggests the SiO2/SiC interface has intrinsic non-uniformity generating high surface potential fluctuations.

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