Loaded-Line Digital Phase Shifters

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In this chapter, various practical loaded-line digital phase shifter topologies are introduced. Explicit design equations and related design algorithm for each phase shifter topology are presented. Electrical performance analysis of the loaded-line digital phase shifters are studied by means of examples and S/W tools specifically developed for this book. It is shown that larger the phase shift is, smaller the bandwidth. Loaded-line phase shifters are good for small phase shifts. Moreover, it is not possible to construct a 180° phase shifting cell employing the loaded-line phase shifters. In the phase shifter designs, we employed digital loads either in series or in parallel configurations. Solid-state switches used in the designs could be PIN, varactor diodes, or any kind of CMOS. Ideally, when the switches are forward biased, they are ideally short circuits. When they are reverse biased, they act like capacitors. Immittance switching from one state to other results in the desired phase change at the design frequency. There are two kinds of loaded-line digital phase shifters (LL-DPS) namely perfectly matched and intrinsically mismatched LL-DPS. Perfectly matched LL-DPS has no loss at the design frequency. On the other hand, in the intrinsically mismatched LL-DPS, there is an unequalized loss at both digital states. Therefore, they provide smaller phase range and narrower frequency band over the perfectly matched digital phase shifters. Perfectly matched LL-DPS can cover a much wider digital phase range up to 180° phase range. However, frequency band becomes narrower as the digital phase shift increases.