Linearity performance and intermodulation distortion analysis of D-MOS vertical TFET

Abstract

Recent trend researches provide potential results of tunnel field effect transistors (TFETs) for being used in many electronic circuit applications. This work studies the comparative analyses of n+ pocket vertical TFET and dual MOSCAP (D-MOS) vertical TFET to determine their compatibility in RF applications. Synopsys TCAD simulation result shows a better ION/IOFF ratio (8.43 × 108), steeper sub-threshold swing (18.67 mV/dec) and an enhanced ambipolarity behavior of the proposed D-MOS VTFET. A comprehensive investigation of both the devices under consideration is performed and comparison has been made on their linearity and intermodulation distortion performances. Certain figure of merits of RF performance such as their higher order transconductance characteristics, second- and third-order voltage intercept points (VIP2 and VIP3), third-order input intercept point (IIP3), third-order intermodulation distortion (IMD3), 1 dB compression point and total harmonic distortions have been explored in this work. From the analyses performed, the proposed dual MOSCAP VTFET is found to be comparatively linear where minimum intermodulation distortions and lesser higher order harmonics are guaranteed. Finally, the status of the proposed TFET is highlighted as an efficient device for RF circuit applications.