Linear array processors with multiple access modes memory for real-time image processing

Abstract

This paper presents the linear array processors with multiple access modes memory system (LAPMAMM), an efficient mono-dimensional parallel architecture for real-time image processing. This architecture is composed of n processors and n 2 memory modules. These memory modules have multiple access modes: RAM, FIFO, normal CAM and interactive CAM modes. They are associated to a linear array of VLIW processors which are interconnected using a simple tree network that ensures an O(log( n)) data propagation time. The practical working of the architecture is explained using the example of a labeling algorithm developed for LAPMAMM. A hardware simulation of a LAPMAMM prototype has been carried out to test its performance in low and intermediate level image processing. The simulation results of the VHDL model are presented.