Abstract

Over the last decade attacks have repetitively demonstrated that bitstream protection for SRAM-based FPGAs is a persistent problem without a satisfying solution in practice. Hence, real-world hardware designs are prone to intellectual property infringement and malicious manipulation as they are not adequately protected against reverse-engineering.In this work, we first review state-of-the-art solutions from industry and academia and demonstrate their ineffectiveness with respect to reverse-engineering and design manipulation. We then describe the design and implementation of novel hardware obfuscation primitives based on the intrinsic structure of FPGAs. Based on our primitives, we design and implement LifeLine, a hardware design protection mechanism for FPGAs using hardware/software co-obfuscated cryptography. We show that LifeLine offers effective protection for a real-world adversary model, requires minimal integration effort for hardware designers, and retrofits to already deployed (and so far vulnerable) systems.

Highlights

  • Field Programmable Gate Arrays (FPGAs) combine software flexibility with the performance and energy advantages of hardware solutions and are widely adopted in a variety of security and safety-sensitive application domains, including industrial automation, aviation, defense, medical devices, and performance accelerators for machine-learning applications

  • We propose several hardware primitives that take advantage of the intrinsic structure of FPGAs: (1) self-integrity checks and bitstream manipulation detection based on bitstream structure information, and (2) covert communication channels based on both partial reconfiguration and deliberately injected crosstalk for obfuscation purposes

  • Generality Even though our techniques and our proof-of-concept focus on Xilinx SRAMbased FPGAs, our technique can be adapted to other Static Random Access Memory (SRAM)-based FPGAs of other vendors as well

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Summary

Introduction

Field Programmable Gate Arrays (FPGAs) combine software flexibility with the performance and energy advantages of hardware solutions and are widely adopted in a variety of security and safety-sensitive application domains, including industrial automation, aviation, defense, medical devices, and performance accelerators for machine-learning applications. Even though the post-manufacturing re-programmability of FPGAs provides flexibility, it opens up a critical attack vector, in particular in settings in which an adversary is able to access the FPGA hardware configuration data (a bitstream). The majority of FPGAs in use today are based on Static Random Access Memory (SRAM). Technology, and requires external non-volatile memory to store bitstreams, which are often accessible by adversaries [EMP20]. FPGA vendors introduced bitstream encryption schemes about two decades ago. Despite a seemingly simple cryptographic set-up — the FPGA decrypts the encrypted bitstream upon boot-up — providing a sound security design has been a vexing problem for the Licensed under Creative Commons License CC-BY 4.0

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