Leveraging spintronic devices for ultra-low power in-memory computing: Logic and neural network

Abstract

In-Memory computing has drawn many attentions as a promising solution to reduce massive power hungry data traffic between computing and memory units, leading to significant improvement of entire system performance and energy efficiency. Emerging spintronic device based non-volatile memory is becoming a next-generation universal memory candidate due to its non-volatility, zero leakage power in un-accessed bit-cell, high integration density, excellent endurance and compatibility with CMOS fabrication technology. In this paper, we present that different spintronic devices based memory, including spin-orbit torque magnetic random access memory (SOT-MRAM), magnetic racetrack memory, magnetic skyrmion, could be leveraged to implement an energy efficient inmemory computing platform. Then, we employ SOT-MRAM and racetrack memory to develop an efficient in-memory data encryption engine that could encrypt data within memory. Furthermore, we also show that emerging magnetic skyrmion device could be leveraged to design a tunable skyrmion neuron cluster that approximate non-linear neuron activation function, which is promising to achieve two orders of lower energy consumption compared with CMOS counterparts.