Leakage Suppression Approaches in Bulk FinFETs

Abstract

The Bulk FinFETs are preferred due to its low wafer cost, less defect density and less heat transfer even though the substrate leakage problem will turn up. Technological complexity and mobility degradations prevent the usage of substrate doping and variation in isolation oxide thickness to reduce off current. Stack gate technology bring down the leakage by using two gate materials with undoped substrate which is free from random dopant fluctuations. The corner effect of bulk FinFET is minimised by using corner implantation and an optimal design of FinFET is obtained. Structure with different high-k dielectric spacers is analysed to see the device performance on 3-D TCAD device simulator. It is observed that as the dielectric constant increases, performance also increases which is a requisite for low power application of the bulk FinFET.