Abstract

In this work, a Schottky junction on the drain side employing low workfunction (WF) metal is proposed as a method to suppress the OFF-state leakage in nanowire (NW) field-effect transistor (FET). Instead of a highly n+ doped drain, low WF metal with negative electron Schottky barrier height (SBH) as a drain minimizes the lateral band-to-band tunneling (L-BTBT) considerably. L-BTBT is the movement of carriers (holes) from the drain conduction band into the channel valence band during the OFF-state. Impact of varying WF at channel–drain junction on the device characteristics is studied. It is observed that SBH \(\leqslant 0\) eV is required to mitigate L-BTBT compared to the conventionally doped and junctionless (JL) NW counterpart. Furthermore, unlike L-BTBT, leakage in NW Schottky drain (SD) comprises of holes tunneling through the SB from the metal drain into the channel and is termed as the lateral SB tunneling (L-SBT). In contrast with JL NW FET, the process variation immunity (varying channel doping, \({N}_{\mathrm{Ch}}\) and NW diameter, \({d}_{\mathrm{NW}}\)) and the ON-state current of the proposed device are not compromised at the expense of lower OFF-state L-SBT. Instead, the device is less susceptible to process variations and retains the ON-state performance of the NW MOSFET. For a ± 20% change in \({N}_{\mathrm{Ch}}\), \(\Delta {I}_{\mathrm{OFF}}\)/\({I}_{\mathrm{OFF}}\) of 7% compared to 97% in NW JL FET is observed.

Highlights

  • T Ill low drive current due to band-to-band (BTBT) tunneling mechanism in Tunnel field-effect transistor (FET) has hampered the replacement of MOSFETs in low power circuits [1]–[3]

  • GAA architecture, has its own disadvantage of considerable band overlap between the channel valence band (VB) and the drain conduction band (CB) due to the tight gate control. This occurs due to higher electric field at the channeldrain junction in the OFF-state, which in turn, facilitates the lateral band-to-band tunneling (L-BTBT) of electrons from the channel VB to the drain CB in case of n-channel NW MOSFETs [15]–[17]

  • The higher tunneling rate in case of the NW MOSFET and NW JL FET is clearly evident, which further results in the increased leakage compared to the NW SD FET

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Summary

INTRODUCTION

T Ill low drive current due to band-to-band (BTBT) tunneling mechanism in Tunnel FET has hampered the replacement of MOSFETs in low power circuits [1]–[3]. It is inferred that NW JL FET cannot simultaneously, retain the advantage of suppressed L-BTBT in addition to drive current capacity of NW MOSFET [21]–[24] Another major problem with the JL architecture is the increased threshold (Vth) variability due to the high channel doping. To resolve the aforementioned issues, NW JL accumulation mode FET (NW JAM FET) is proposed, wherein, source/drain (S/D) are ion-implanted while channel doping is more controlled compared to the JL architecture [15], [16]. This, in turn, significantly increases the OFF-state leakage in NW MOSFETs. To overcome the L-BTBT problem and simultaneously retains the advantage of higher ON-state current of NW MOSFET with better process variation immunity, the present work proposes a NW FET architecture employing a low workfunction metal drain.

DEVICE STRUCTURE AND SIMULATION APPROACH
RESULTS AND DISCUSSION
Impact of dNW Scaling
Impact of Channel Doping
CONCLUSION
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