Abstract

Miniaturization and the integration of a growing number of functions in portable electronic devices require an extremely high packaging density for the active and passive components. There are many ways to increase the packaging density and a few examples would be to stack them such as with Package on Package (PoP), fine pitch CSP's or solder flipchip on board. This means that the size and pitch of solder balls or pads in the electronic component packages will continue to shrink and that component stacking with so called Package on Package (PoP) and fine-pitch CSP's will continue to be heavily used. Another important factor is that not only is the area density increasing and the drive to make portable electronics thinner also drives thinner components and thereby warpage becomes one of the key challenges. The use of fine pitch CSP and PoP component's, equal and below 0.40mm pitch, poses a number of challenges for PCB Design, SMT Assembly process and Reliability and since the assembly methods and requirements of these are very similar to lead-free solder flipchips this means lead-free solder flipchip on board can be implemented into high volume consumer products at minimal extra cost of process or materials such as flux underfill and last but not least the cost of printed circuit boards. First, a feasible assembly process must be achieved. The assembly process ranges all the way from screen-printing, dipping in flux or paste, reflow soldering in air or nitrogen and underfill. Many factors influence the quality of the assembly process and with the reduced pitch, the process capabilities for both assembly and PCB fabrication will be tested to its limit and beyond. The basic processes to control are screen-printing, pick & place, reflow soldering with the aid of Nitrogen and underfill and by using solder flipchip some of the challenges can actually be eliminated but there will also be some extra challenges such as known good die, wafer feeding and others. Second, the correct incoming materials such as PCB material, PCB surface finish, solder paste, dipping flux, underfill and PCB design need to be selected to ensure a high yielding, cost effective and reliable interconnects. Of course, the mechanics of the products makes a big difference as well but it is very product dependent and many of today's products leave little room for designing the mechanics in the most reliable way due to total cost and overall look and size of the products This paper will discuss different design & layout alternatives and assembly & material selection alternatives for using 0.18mm pitch solder flipchips instead of 0.30-0.40mm pitch CSP's and their corresponding challenges. Different flux and underfill materials are evaluated for compatibility with the lead-free solder and halogen free materials and processes. Results from assembly and reliability testing will be presented, in comparison with 0.30mm pitch CSP's on halogen free FR4 substrates with and without underfill.

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