LDMOS with Variable-k Dielectric for Improved Breakdown Voltage and Specific On-resistance

Abstract

A silicon-on-insulator (SOI) lateral doublediffused MOSFET (LDMOS) with variable-k dielectric is proposed, which features three-section high-k dielectrics placed over the drift region. Beneficial from the modulation, by high-k dielectrics, on electric fluxes in the drift region, the electric field strength is locally enhanced, and has a more uniform distribution along the surface of the drift region, which an increment of the breakdown voltage (BV) ascribes to. Moreover, due to the electric fluxes prefer to flow towards and through a high-k dielectric, an increase in the dose of the drift region is thus possible to reduce the specific on-resistance (R<SUB>on,sp</SUB>), since the extra electric fluxes caused by those increased impurities would flow, upwards, into the high-k dielectric, and barely make contributions to the xcomponent of the surface electric field, which indicates that the BV would not be affected. Based on a comparison with the conventional LDMOS, the BV of the proposed LDMOS increased by 31% with a decrease of 13% in the R<SUB>on,sp</SUB>. The figure of merit (FOM) increased approximately 2 times.