Abstract
This paper presents criteria, using simple integer arithmetic, to determine if a layout of a pair of devices broken into multiple, identical sections cancels the effect of nonlinear process gradients. These criteria allow quantification of 12 layout symmetries that can be leveraged to cancel specific process gradient components. “Dispersion,” the degree to which device segments are distributed throughout a layout, is also quantified in a simple and intuitive way, and used to identify which of multiple gradient canceling layouts is best. Techniques to construct maximally dispersive quadratic gradient canceling layouts with arbitrary numbers of rows and columns are presented.
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More From: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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