Abstract
The purpose of this work is to explore whether lateral dynamic emitter current-crowding (ECC) occurring during fast large-signal switching of bipolar transistors can be described sufficiently accurately and computationally efficiently with a 1-transistor (1-T) compact model.employing lateral charge partitioning across the internal base resistance. A procedure for determining the lateral charge partitioning factor is presented, 2-D mixed-mode device/circuit simulation and a distributed 10-transistor (10-T) compact model serve as reference for validating the compact model.
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