Large initial compressive stress in top-down fabricated silicon nanowires evidenced by static buckling

Abstract

Single crystal silicon nanowires with a width down to 25 nm and a length-to-width (L/w) aspect ratio up to 177 were fabricated by surface micromachining of thin SOI wafers. It is demonstrated that these top-down fabricated clamped-clamped nanowires are laterally buckled when L/w is larger than about 44. This is attributed to an unexpected high compressive residual pre-stress estimated to be in the −270 to −335 MPa range from a simple nonlinear post-buckling model. The origin of this stress is investigated by considering several axial stress generation mechanisms in the silicon nanowires such as thermomechanical stresses, surface layers and deformation stresses of dies induced by patterning or die attachment. It is shown that none of these mechanisms can generate the observed initial compressive stress and high temperature steps during SOI wafers fabrication and/or thinning are likely to be the main cause of high compressive stress generation. Possible occurrence of a large stress in top-down fabricated Si nanowires is often ignored and must be considered in future works notably for electrical and thermal transport investigations.