Large-Current Output Digital Gate Driver for 6500 V, 1000 A IGBT Module to Reduce Switching Loss and Collector Current Overshoot

Abstract

An 8-bit digital gate driver (DGD) using a half-bridge digital-to-analog converter (HB DAC) IC and two power MOSFETs is proposed to enable the output voltage swing of ± 15 V and the large gate current up to 28 A to reduce the switching loss ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">E</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LOSS</sub> ) and the collector current overshoot ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OVERSHOOT</sub> ) in a high-voltage, large-current IGBT module (HVIGBT) rated at 6500 V and 1000 A. <fn fn-type="other" id="fn3" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> This paper was presented in part at IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD), Vancouver, Canada, May 22–25, 2022. This work was partially supported by NEDO (JPNP21009). Kohei Horii, Hiroki Yano, Katsuhiro Hata, Ruizhi Wang, and Makoto Takamiya are with Institute of Industrial Science, The University of Tokyo, Tokyo 153-8505, Japan (e-mail: mtaka@iis.u-tokyo.ac.jp). Kazuto Mikami, Kenji Hatori, and Koji Tanaka are with Mitsubishi Electric Corporation, Fukuoka 819-0192, Japan. Wataru Saito is with Research Institute for Applied Mechanics, Kyushu University, Fukuoka 816-8560, Japan (e-mail: wataru3.saito@riam.kyushu-u.ac.jp). </fn> By using the DGD to drive HVIGBT, the effectiveness of the active gate driving (AGD) is demonstrated for the first time in the world in the high voltage and large current range of 3.0 kV to 4.5 kV, 1000 A. The values of 1000 A, 4500 V, and ± 15 V are the world's highest records in AGD. For the purpose of investigating the optimum gate driving waveforms of AGD for HVIGBT, four different gate drive methods are compared in detail by measurements at 3.6 kV, 1000 A, and the stop-and-go gate driving is selected from a cost-performance perspective. Finally, a design guideline of AGD for HVIGBTs is clarified. The design guideline is to align the two peak heights of the collector current waveforms, thereby minimizing <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">E</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LOSS</sub> and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OVERSHOOT</sub> .