Large-area integration of two-dimensional materials and their heterostructures by wafer bonding

Martin Otto,Stefan Wagner,Arne Quellmalz,Georg S. Duesberg,Max C. Lemme,Burkay Uzlu,Simon Sawallich,Xiaojing Wang,Zhenxing Wang,Kristinn B. Gylfason,Siwei Luo,Niclas Roxhed,Göran Stemme,Maximilian Prechtl,Frank Niklaus,Oliver Hartwig

doi:10.1038/s41467-021-21136-0

Abstract

Integrating two-dimensional (2D) materials into semiconductor manufacturing lines is essential to exploit their material properties in a wide range of application areas. However, current approaches are not compatible with high-volume manufacturing on wafer level. Here, we report a generic methodology for large-area integration of 2D materials by adhesive wafer bonding. Our approach avoids manual handling and uses equipment, processes, and materials that are readily available in large-scale semiconductor manufacturing lines. We demonstrate the transfer of CVD graphene from copper foils (100-mm diameter) and molybdenum disulfide (MoS2) from SiO2/Si chips (centimeter-sized) to silicon wafers (100-mm diameter). Furthermore, we stack graphene with CVD hexagonal boron nitride and MoS2 layers to heterostructures, and fabricate encapsulated field-effect graphene devices, with high carrier mobilities of up to 4520;{mathrm{cm}}^2{mathrm{V}}^{ - 1}{mathrm{s}}^{ - 1}. Thus, our approach is suited for backend of the line integration of 2D materials on top of integrated circuits, with potential to accelerate progress in electronics, photonics, and sensing.

Highlights

Integrating two-dimensional (2D) materials into semiconductor manufacturing lines is essential to exploit their material properties in a wide range of application areas
The growth substrate is removed (Fig. 1a (4)) by either etching, delamination, or permeation of liquids into the interface between the 2D material and the growth substrate, which leaves the 2D material transferred on the target wafer (Fig. 1a (I))
Since BCB is a thermosetting polymer, heating partially cross-links the polymer chains in the adhesive layer, which form a network with high a Wafer-level transfer of 2D materials

Summary

Introduction

Integrating two-dimensional (2D) materials into semiconductor manufacturing lines is essential to exploit their material properties in a wide range of application areas. Used wet transfer approaches rely on an intermediate polymeric carrier, typically poly(methyl methacrylate) (PMMA)[32,33,34] or polycarbonate[35,36], which mechanically supports the 2D material during its removal from the growth substrate and the transfer to the target substrate by scooping from the surface of a liquid This process may be implemented at various stages of the device fabrication and allows the placement of the 2D material directly on a target substrate of choice, including complementary metal oxide semiconductor electronic wafers. Residuals of the polymeric carrier layer remain on the surface of the 2D material and degrade its electronic transport properties[38,39] Attempts to minimize these adverse effects of wet transfer include bubble delamination[40], advanced cleaning procedures[41], and replacing poly(methyl methacrylate) with paraffin as carrier polymer[42]. These findings indicate that our proposed integration approach preserves similar mechanical properties of the 2D materials as present on the growth substrate while minimizing degradation of the transferred layers through the introduction of wrinkles or excessive strain

Methods

Results

Conclusion