(Keynote) Hybrid Bonding and through Silicon Vias - Opportunities and Challenges

Abstract

3DICs are uniquely enabled by Hybrid Bonding and Through Silicon Via technologies. In this talk we will explore applications of these technologies, emerging opportunities and barriers to future scaling.Hybrid bonding enables a high density face to face mating of two wafers or a wafer and a chip. It has a number of applications including imagers, and potentially 3D digital logic. The first part of this talk will explore approaches to and advantages gained using Hybrid bonding in these applications. Digital systems can exploit hybrid bonding through heterogeneity and aggressive partitioning and integration. Design flows will be presented together with examples of systems that benefit from Hybrid Bonding. Through multiple examples, the potential for Hybrid bonding to deliver a Moore’s Law generational equivalent will be explained.Today Hybrid bonding is limited to around 1.6 um pitch. Achieving tighter pitches requires improvement in a number of processes and materials. This issues will be covered along with a discussion on potential applications, especially as regarding monolithic 3D integration.Through silicon vias (TSV) are used for IO and extended stacking purposes. They have been extensively used in memory systems and interposers.TSVs are also useful in heterogeneous integration. A particularly attractive opportunity is the use of TSVs in Silicon Carbide for GaN and other wide bandwidth transistor based systems. Architectures and applications will be explored with a particular focus on stress management.