Abstract
MEMS fabrication that is based on the silicon-on-glass (SOG) process requires many steps, including patterning, anodic bonding, deep reactive ion etching (DRIE), and chemical mechanical polishing (CMP). The effects of the process parameters of CMP and DRIE are investigated in this study. The process parameters of CMP, such as abrasive size, load pressure, and pH value of SF1 solution are examined to optimize the total thickness variation in the structure and the surface quality. The ratio of etching and passivation cycle time and the process pressure are also adjusted to achieve satisfactory performance during DRIE. The process is optimized to avoid neither the notching nor lag effects on the fabricated silicon structures. For demonstrating the capability of the modified CMP and DRIE processes, a z-axis micro gyroscope is fabricated that is based on the SOG process. Initial test results show that the average surface roughness of silicon is below 1.13 nm and the thickness of the silicon is measured to be 50 μm. All of the structures are well defined without the footing effect by the use of the modified DRIE process. The initial performance test results of the resonant frequency for the drive and sense modes are 4.048 and 4.076 kHz, respectively. The demands for this kind of SOG MEMS device can be fulfilled using the optimized process.
Highlights
Microstructures fabricated based on silicon-on-glass (SOG) are always defined by through-etching of a thin silicon substrate anodically bonded to glass substrate [1]
During the SOI process, significant notching occurs in the SOI micro fabrication process after the active silicon is etched to the buried oxide layer; this phenomenon is due to the reaction ions that are accumulating on the oxide layer
The aim of final polishing is to remove the damaged layer resulting from the prepolishing processes and to improve the total thickness variation (TTV) and roughness of silicon
Summary
Microstructures fabricated based on silicon-on-glass (SOG) are always defined by through-etching of a thin silicon substrate anodically bonded to glass substrate [1]. The SOG process mainly includesthe wet etching or drying etching silicon, anodic bonding of silicon and glass, chemical mechanical polishing (CMP) the silicon to obtain the certain thickness, and Deep reactive-ion etching (DRIE) the silicon to form the designed structures. After the notching effect is eliminated, the lag effect may play a role in the dry silicon etching process. This effect causes etch uniformity and difficulty in controlling the etch endpoint and degrades the mechanical performance, thereby leading to device failure and footing effect. Allan variance measurements is implemented with ARW of 1.026◦ / h The demands for this kind of SOG MEMS device can be fulfilled by the use of the optimized CMP process
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