Abstract
A joint timing recovery and sequence detection scheme is discussed, which is based on maintaining and updating a separate phase-estimate path for each survivor data path in the Viterbi detector. For each survivor data path, the phase estimate is updated recursively using symbol decisions implied in that path. A loop filter and a voltage-controlled oscillator operate on a delayed sequence of estimated phase associated with the merged survivor path or the best up-to-date survivor path in the Viterbi trellis. The timing error detector is given in a "leaky" recursive form with a forgetting factor to minimize the processing and memory requirement. The proposed timing recovery scheme works well at low signal-to-noise ratio environments, and the overall complexity increase relative to conventional timing loops is small. Steady-state jitter analysis, as well as open-loop and closed-loop simulation results, are provided that validate the proposed approach
Published Version
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