Issues in accelerated electromigration of solder bumps

Abstract

The relentless progress of semiconductor integration is reducing the area required for circuits. As die size shrinks the area available for power and ground bumps on wafer-level chip-scale packages (WLCSPs) also shrinks and, with fewer power bumps, the bump current density is now approaching levels where electromigration is a significant reliability concern. Package designers need guidelines on the minimum number of power and ground bumps for a given application and reliability requirement. The failure rate due to electromigration depends on many factors such as alloy composition, operating temperature, and current density. Some of these have time-dependant components including grain structure, current distribution, and alloy component distribution. It has been found that these, in turn, are also dependent on other factors such as thermomigration and strain-induced coarsening. In such a dynamic system the time-dependant materials properties so obfuscate the extrapolation parameters as to render accelerated testing indeterminate.