Abstract
The critical issues, technical challenges and viable technologies of tunneling FETs (TFET) using a variety of semiconductors such as III-V, Ge, Si and oxide semiconductor are addressed. Device engineering indispensable in improving the performance of TFETs is summarized with emphasis on the source/channel materials and structures. The electrical characteristics of TFETs using InGaAs quantum well (QW) homo-junction TFETs, Ge/strained SOI hetero-junction TFETs and (Si, Ge)/ZnO hetero-junctions are mainly presented as the viable examples.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
