Abstract
We have established new methodologies, materials, processing, devices, and circuits for integrating III-V devices monolithically into CMOS circuits. Certain constraints were applied on this research from the start in order to converge on viable commercial strategies as the research moves closer to a path for new innovation in the semiconductor industry. Integration technology has been established for incorporating HEMTs and LEDs into CMOS integrated circuits, and both nitride-based and arsenic-phosphide-based materials are currently supported. Device models are inserted into standard foundry design libraries, allowing silicon technology efficiencies such as exploring various circuit designs before final physical silicon and fabrication-test feedback loops using test chip designs.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
