Abstract
Advanced CMOS scaling relies on novel structure and design, as well as material developments, which leads to challenging integration issues. Innovation in gap filling technologies, area selective deposition (ASD) and etch processes should help in reaching this scaling specification. Criteria for an adequate area selective deposition process are: growth only on specific regions, high throughput compatible with industrial demands and no so-called mushroom profiles into adjacent features. Several approaches are currently being investigated for the development of ASD processes, among which ASD by surface deactivation with the use of self-assembled monolayers (SAM) or block copolymers, processing temperatures promoting inherent selectivity, and spatial ALD or selective ALD based on ABC-type cycles [1-3]. The original approach developed in our group consists in taking benefit from an in situ etching step inserted in a standard ALD cycle [4, 5]: this so-called deposition/etch approach is already being used for Si epitaxy by the incorporation of HCl in the gas phase. In this presentation, a short introduction on challenges and opportunities for ASD in high volume manufacturing will be presented. A brief state of the art of ASD strategies with their inherent pros and cons will be provided, to open up a discussion on different deposition/etch approaches for Area Selective Deposition, as illustrated in the figure 1. This figure highlights the benefits of developing isotropic as well as anisotropic etching for ASD. Indeed, isotropic plasma etching relies mainly on radical (ie chemical) etching, whereas anisotropic etching can be induced by an appropriate Ion etching process or plasma Atomic Layer Etching (ALE) development. The PEALD/ALE strategy entails a precise energy control of ions flowing from the plasma onto the substrate (with an energy range between 0 and 50 eV). Therefore, a specific design must be conceived for PEALD tool, consistent with this issue. In our work, a low power RF biasing waveform has been applied to the substrate holder in the Flexal deposition tool from Oxford Instruments. Benefits and drawbacks of this deposition/etch approach will be discussed in terms of throughput, etching impact (contamination, roughness…) and process drift. Finally, two examples will be given illustrating a versatile route for topographically selective deposition, either on sidewalls, as needed for spacer fabrication, [6] or on top and bottom of trenches only. This second example will be discussed in regards of surface selective deposition of dielectrics on metal. [1] A. J. M. Mackus et al, Chem. Mater. 31 (2019) 2-12 [2] G. N. Parsons, J. Vac. Sci. Technol. A 37 (2019) 020911 [3] R. Chen, H. Kim, P. C. McIntyre, and S. F. Bent, Appl. Phys. Lett. 84 (2004) 4017 [4] R. Vallat et al, J. Vac. Sci. Technol. A 35 (2017) 01B104 [5] R. Vallat et al, J. Vac. Sci. Technol. A 37 (2019) 020918 [6] A. Chaker et al, Appl. Phys. Lett. 114 (2019) Figure 1
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