Invited paper An investigation into ternary comparison operators

Abstract

This paper considers the use of comparison operators for multipled-value logic, these operators having first being proposed by Wu and Chen (1985). In particular we here discuss the definitions and algebraic relationships of these operators applied to the ternary case, and propose transistor circuit realizations which have a commonality with conventional binary TTL logic circuits. In addition, it is shown that the use of comparison operators leads to simplier algebraic expressions and circuit realizations for ternary addition and comparison compared with previously considered operators, an advantage which may also hold for higher-valued logic.