Abstract

I. Introduction Modeling and simulation of semiconductor devices have been a vital tool in driving the development and comprehensive understanding of the semiconductor physics and devices. In the last 4 decades’ analysis, using state-of-the-art device modeling tool has helped the process of miniaturization of MOSFET by characterizing their parameters, predicting their behavior on the system and circuit level. Additionally, modeling and simulation enhanced a deeper understanding of the critical issues surrounding the device scaling and its impact on overall system level functionality and reliability of its operation. To show their importance, in this paper, we present modeling and simulation of advanced semiconductor devices based on the realistic device structures. II. Model description The modeling of semiconductor devices is based on numerical solutions of a complex mathematical equation that describe their fundamental physical properties. In our TCAD tools, we use ranges of computational approaches. For example, we use the well-known and popular way of describing the carrier behavior, such as Drift Diffusion (DD) which can include Quantum Mechanical (QM) corrected models. Also in our work, we employ more computationally demanding methods such as Ensemble Monte Carlo (EMC) and Non-Equilibrium Green’s Function Formalism (NEGF) to simulate advanced atomistic devices where using the classical DD approach is not adequate to handle the quantum transport typical for the modern ultra-scaled transistors. Moreover, we perform a first principle (ab-initio) calculation from which one can extract physical parameters like band- gap and effective mass (m*) of electrons and holes to be used in the advanced modeling and simulation process. All the methods described above can evaluate the impact of various sources of statistical variability, random discrete dopants and their adverse impact on the device performance. III. Considered devices Advanced devices of current technology generations, such as FinFET and Silicon Nano Wire were born out of the necessity of continuing the scaling beyond the conventional MOSFET architecture. In this section, we present modeling and simulation of some of the existing important devices structures and new promising memory application devices. A. FinFET FinFET technology is massively adopted as the advanced logic node technology. Modeling and simulation of FinFETs and accurate predictions can significantly speed up the next technology node. 7nm technology node is a critical point due to its extremely complicated physics and technical difficulty in fabrication. Employing advanced TCAD tool is critically important in exploring the fundamental physical properties in the 7nm FinFET technology featured with Fin width of 5nm and height of 25nm. Accurate capturing of the charge distribution in the nanoscale channel is mandatory since the quantum effect plays a critical role regarding the performance. We achieved this by using solving 2D Poisson-Schrodinger equation in the cross-section of the device. The wave-functions in the corresponding sub-bands of each valley is calculated and the charge distribution is obtained for different gate biases. The profile of the charge distribution serves as the calibration target in the TCAD calibration tool for density-gradient coupled DD simulation. The calibration results provide accurate charge information for the further simulations. B. Z2FET Z2FET is one of the most complex structures, and yet very promising device to be used for application in a memory cell without connecting to extremal charge storage component (aka 1T-DRAM). Significant progress has been made in characterizing its memory behavior and analyzing its physical properties. These qualities can be exploited in the implementation of Z2FET in embedded 1T-DRAM application. To understand the complexity of this promising device, TCAD model is an invaluable asset. Although there are some experimental data that may help the characterization process, the use of numerical modeling is equally important in understanding the dynamics of carriers, how the DC operation of this device can be characterized in the different sections of the device. In this paper, we investigate the DC operation of Z2FET in conjunction with its memory behavior and how it can be used in 1-TDRAM memory cell. We present simulation based detail analysis of Z2FET in the main paper. C. Silicon Nano Wire Transistors Silicon nanowires have numerous potential applications, including transistors, memories, photovoltaics, biosensors and qubits. In this work, we demonstrate a solution by exploiting the quantum effects of a 1-Dimensional (1D) Si nanowire transistor and analyze 1D nanowires in a scalable, top-down Si technology.

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