(Invited) Interface Treatment Related Defects During Ge Gate Stack Formation

Abstract

Germanium as a high mobility channel material is currently of considerable interest since Ge has both higher electron and hole mobility as compared to silicon (1). The deposition of high-k dielectrics on Ge has been a significant challenge because of high interface defects density, Dit (2). By considering the interface reaction kinetics, thermal budget various atomic layer deposition (ALD) schemes and interface treatments can be identified to get a stable dielectric with a robust interface. However, understanding of the interface kinetics and defect distribution into gate stack and/or Ge is still limited.In this work, we report the impact of different interface treatments on the p type Ge prior to any high-k layer deposition on defect generation. Ge surface was oxidized by a controlled chemical oxidation, slot-plane-antenna plasma oxidation and oxidation through vapor O3 treatment before ALD deposition of 1nm Al2O3/3.5nm ZrO2 for gate stack formation. These devices were characterized to evaluate the interface and possible bulk defects by deep level transient spectroscopy (DLTS), capacitance spectroscopy, conductance method in addition to standard I-V and C-V measurements. DLTS has the advantage to have the spectrum comparison among the interface treatments. Signature of these spectra can reveal the difference, which is more accurate than the defects estimated by Conductance method. DLTS also provides the signature of slow traps (~1ms) (Fig. 1) originating from the bulk or interface depending on the type of GeOx formation.Furthermore, we evaluate the defect distribution when the gate stack was subjected to a slot-plane antenna plasma oxidation prior to metal deposition. A TiN/Hf1-xZrxO2/Al2O3/Ge gate stack with six different Zr content was investigated (Fig. 2). Al2O3 was used to impede the Ge diffusion into the gate stack. Interface state density (Dit) and C-V hysteresis show that the mid-gap Dit tend to increase with decrease in EOT, possibly due to the undesirable native oxide formation on Ge.The author would like to thank Drs. Y.M. Ding (Western Digital Corporation, Shanghai, China), M.N. Bhuyian (Globalfoundries, Malta, NY, USA), K.L. Ganapathi (Indian Institute of Technology Madras, India), N. Bhat, (Indian Institute of Science, Bangalore, India) and K. Tapily, R. D. Clark, S. Consiglio, C. S. Wajda, G. Nakamura, and G. J. Leusink of TEL Technology Center, America, Albany, NY, for their help in this work. References Arimura et al, IEDM Technical Digest, (2020)N. Bhuyian et al, ECS Journal of Solid-St. Sci. and Tech., vol. 7(2), N1-N6, (2018)G. Kolla et al, J. Vac. Sci. Technol. B, 36(2), 021201 (2018)Ding et al, IEEE Trans. on Dev. and Materials Reliability, 17(2), 349-354, (2017)Ding, et al, J. of Vac. Sci. and Technol. B, 34(2), 021203, 2016. Figure 1