(Invited) Hybrid III-V/Si CMOS Technology Platform: From Materials for Logic to Integrated RF and Photonics

Abstract

In the past few years, tremendous progress has been achieved in the integration of III-V compound semiconductors on a Si CMOS platform as high-mobility channel materials are foreseen as potential candidates to replace Si channels in advanced CMOS technology nodes. Beyond CMOS scaling, the integration of III-V materials and devices on a Si CMOS platform enables bringing their traditional enhanced functionalities to the chip level: high-speed low-noise RF as well as lasers and sensitive photodetectors. In this presentation, we will review the technologies that we developed to monolithically integrate III-V materials on Si by direct epitaxy in empty oxide cavities or by direct wafer bonding. We will show that record logic n-MOSFET performance can be achieved for ultra-scaled gate lengths (Lg = 13nm), that hybrid III-V/Si(Ge) CMOS functionality can be obtained (inverters, 6T-SRAMs). We will then highlight how 3D monolithic integration enables seamless integration of III-V functionalities on top of Si CMOS front-end for logic as well as for RF and Photonics.