(Invited) Gate-All-Around Transistors Based on Vertically Stacked Si Nanowires

Abstract

We report on gate-all-around (GAA) N- and P-MOSFETs made of 8-nm-diameter vertically stacked horizontal Si nanowires (NWs). We show that these devices, which were fabricated on bulk Si substrates using an industry-relevant replacement metal gate (RMG) process, have excellent short-channel characteristics (SS = 65 mV/dec, DIBL = 42 mV/V for LG = 24 nm) at performance levels comparable to FinFET reference devices. Furthermore, CMOS integration of GAA MOSFETs is demonstrated. Threshold voltage tuning is achieved by nanowire-compatible dual-work-function metal integration.