(Invited) GaN-Based Multiple 2DEG Channel BRIDGE (Buried Dual Gate) HEMT Technology for High Power and Linearity

Abstract

A unique combination of high mobility, high velocity and high sheet density of the 2DEG formed in GaN-based heterostructures has enabled GaN-based HEMTs to be used in a wide range of applications from RF power amplifiers to efficient power converters. Today’s complex communication systems require transceivers to process RF signals efficiently with large bandwidth and high fidelity. While GaN-based HEMT technology has advanced to reach higher power densities, it has not fundamentally changed the power requirements for the linearity performance. To address fundamental limitations of HEMT’s power/linearity/efficiency/frequency tradeoff, we proposed a transistor structure called BRIDGE FET (buried dual gate FET) where gate electrodes are buried into AlGaN/GaN heterostructures and contact laterally with multiple 2DEG channels [1]. A deliberate elimination of a conventional top-contact gate leads to a unique device operation principle and performance advantages for improved linearity and efficiency at large signal operations; (1) The drain-source current is controlled solely by modulating the width of the 2DEG channels by the lateral gate electric field while maintaining the 2DEG density. (2) The MESFET-like device operation enables gradual pinch-off, greatly reducing g m derivatives near pinch-off. (3) Lack of density modulation with V gs leads to a constant electron velocity at high electric field, eliminating a typical g m roll-off at high V gs. This results in a constant gain along a resistive load line. (4) The buried gates forms Schottky contacts to the GaN channels below the 2DEG layers. This enhances electron confinement and improves electrostatic isolation between the source and drain, significantly reducing g d at high V ds. (5) Elimination of the top-contact gate prevents electrons from being trapped on the surface, suppressing current collapse at high voltage operations. (6) An absence of inverse piezoelectric effect due to the reduced vertical electric field at the drain-side of the gate improves device reliability under high voltage stress. In this presentation, current status of our development of multi-2DEG channel BRIDGE FETs will be discussed. This work was sponsored by DARPA-MTO DREaM program under DARPA/CMO Contract No. FA8650-18-C-7807. The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressly or implied, of the Defense Advanced Research Projects Agency or the U.S. Government. [1] K. Shinohara et al., IEEE EDL, vol. 39, no. 3, p. 417, March 2018.