Investigation on the local variation in BCAT process for DRAM technology

Abstract

A buried-channel-array transistor (BCAT) is used for increasing the effective channel length for the same area of DRAM while, suppressing the subthreshold leakage with buried word line scheme [1-2]. So far now the local variations in dimension and topology have not been our major concern to control the characteristic of DRAM. Moreover, the local variation is hard to identify and control in sub-20nm devices. The local variation of fin height plays a vital role in determining a performance of DRAM and this variation is caused by subtle differences during the process [3]. We discovered that controlling the active dimension and profile is the key factor to improve local variability. This also suggests that a measurement of a threshold voltage in an array of cell transistor could be the effective method to figure out a degree of local variation.