Investigation of trigate JLT with dual-k sidewall spacers for enhanced analog/RF FOMs

Abstract

This paper shows the potential benefits of using the trigate junctionless transistor (JLT) with dual-k sidewall spacers to enhance analog/radio-frequency (RF) performance at 20-nm gate length. Simulation study shows that the source-side-only dual-k spacer (dual-kS) JLT can improve all analog/RF figures of merit (FOMs) compared with the conventional JLT structure. The dual-kS JLT shows improvement in intrinsic voltage gain ($$A_{V0}$$AV0) by $$\sim $$~44.58 %, unity-gain cutoff frequency ($$f_\mathrm{T}$$fT) by $$\sim $$~7.67 %, and maximum oscillation frequency ($$f_\mathrm{MAX}$$fMAX) by $$\sim $$~6.4 % at drain current $$(I_\mathrm{ds}) = 10\,\upmu \hbox {A}/\upmu \hbox {m}$$(Ids)=10μA/μm compared with the conventional JLT structure. To justify the improvement in all analog/RF FOMs, it is also found that the dual-kS structure shows high electron velocity near the source region because of the presence of an additional electric field peak near the source region, resulting in increased electron transport efficiency and hence improved transconductance ($$g_\mathrm{m}$$gm). Furthermore, the dual-kS JLT shows a reduction in the electric field value near the drain end, thereby improving short-channel effects.