Investigation of Si Implantation into ILD (Interlayer Dielectric) for film property modification

Abstract

In this paper, a specific Si ion implantation is investigated as applied to ILD (Interlayer Dielectric) films (include SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and SiN) property modification. The etch rate change of the films before/post implantation were checked by dilute HF solution and F radical contain plasma gas (SiCoNi@AMAT™). Different implant energy and dosage were also studied. It is found the etch rate of oxide and SiN films by dilute HF are both reduced dramatically after Si implantation, while etch rate as collected in SiCoNi chamber is varied by implant dosage. The as implanted Si profiles in dielectric films were checked by SIMS, which are consistent with the DHF wet etch rate (WER) change along the film surface to bulk. We also applied this Si implantation on HK/MG last CMOS device manufacture flow, the cross-section TEM results of pattern wafers confirm that it can obviously reduce the ILD films loss during dummy poly and oxide remove process.