Abstract
In NEC's standard process, the minimum junction size is 2 µm and the critical current density (JC) is 2.5 kA cm-2. In the process, i-line stepper lithography and reactive ion etching with SF6 gas are used and the standard deviation () of the critical current (IC) was 0.9% for the 2 µm junctions. This junction uniformity enables integration of more than 10M junctions if an IC variation of ±10% permits correct circuit operation. A 512-bit shift register was designed and fabricated by our standard process. Correct 512-bit delay operation was obtained. These results are promising for the large-scale integration of single flux quantum circuits.
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