Abstract
We present a sidewall transfer lithography (STL) process to fabricate silicon nanowires using the CMOS compatible materials SiO 2 , SiN and α-Si. The STL process is implemented using a single cluster tool for reactive ion etching (RIE) and plasma enhanced chemical vapor deposition (PECVD) with a maximum process temperature of 400 °C. Using three lithography masks, single and multiple silicon nanowires connected to contact areas can be defined. By optimizing layer thicknesses, RIE and deposition conformity we demonstrate wafer scale definition of 60 nm wide silicon nanowires using I-line stepper lithography. The silicon nanowires exhibit excellent characteristics for biosensing applications with subthreshold slopes of 75 mV/dec and a high on/off current ratio of more than 105.
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