Investigation of p-GaN Gate HEMT using Removal Si Substrate and part of Buffer Layer

Abstract

Normally-off p-GaN gate high electron mobility transistor (HEMT) on Si substrate using the back-side via process was investigated. We removed the Si substrate and part of the GaN carbon-doped layer. A 100 nm thickness of SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> layer is deposited on the back-side via to obstruct the buffer leakage, and a 1um thick gold is electroplated to improve the self-heating effect. With and without the backside via process, the threshold voltages are 0.92 and 1.45 V, the on/off drain current ratios are 5×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">10</sup> and 5×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> , the subthreshold swings are 154 and 224 mV/dec, the static on-resistances are 24.77 and 27.55 Ω.mm, and the dynamic on-resistance ratios are 1.18 and 1.3.