Investigation of microstructure and electrical properties of Sm doped ceria thin films

Abstract

Sm0.2Ce0.8O2−δ (SDC) thin films (~1.9μm) were deposited on SiO2, Alloy 600 (Fe-Ni-Cr), and Al2O3 substrates, using e-beam evaporation technique. The deposition rate was 0.2nm/s÷1.6nm/s, and substrate temperature during the formation of thin films was kept 323K, 423K, 573K, 723K and 873K.SEM analysis reveals that grain size increases at 323K, 423K, and 573K substrate temperatures and decreases at 723K and 873K temperatures. The preferential out-of-plane orientations of thin SDC films were (111) and (222). Texture coefficients of those orientations decrease at high deposition rates (1.2nm/s and 1.6nm/s) and high substrate temperatures (723K and 873K). The preferential orientation changes to (220) or (222) using SiO2 substrates (1.2nm/s and 1.6nm/s growth rate; 423K, 723K, and 873K substrate temperature) and to (200), (220), or (311) using Alloy 600 substrates (0.2nm/s, 0.8nm/s, 1.2nm/s, and 1.6nm/s deposition rate; 723K and 873K substrate temperature). Crystallite size increases from 6.8nm to 80.6nm with increasing substrate temperatures (323K÷873K) and influences total conductivity of SDC thin films; it increases (0.03·10−3S/m÷1.12S/m) with increasing crystallite size. Ce3+ concentrations change from 24.5% to 29.1% in thin SDC films and do not show clear correlation with changes of total conductivity. In addition, thin films deposited at 323K÷423K temperatures and 0.4nm/s÷1.6nm/s deposition rates have reduced total conductivity.