Investigation of Interface States, Series Resistance and Barrier Height Variation with Frequency in Al/WO3/p-Si (MOS) Capacitors

Abstract

In the study, Tungsten oxide (WO3) was synthesized via the sol-gel method on P-type 〈100〉 silicon wafer. Electrical characterization of the Al/WO3/p-Si (MOS) capacitor was performed through capacitance-voltage (C-V) and conductance-voltage (G/ω-V) measurements at different frequencies (from 50 kHz to 1 MHz). As the applied voltage frequency increased, the maximum values of the measured C-V and G/ω-V characteristics decreased. This phenomenon was attributed to interface state trap (Dit) charges following low-frequency AC voltage signals. The variation of series resistance (Rs) and barrier height (ΦB) with frequency was examined. It was shown that Rs significantly affects the device behaviour. The ΦB also decreased with increasing frequency. This situation is suggested to indirectly affect the mobility of charge carriers directly through the Vo value. Ultimately, although WO3 material exhibits variable results in terms of dielectric properties, the study's finding of a high dielectric constant (e.g., 3688.75) is consistent with similar results in the literature. This high dielectric property underscores the material's importance for future applications.