Abstract
In this paper, a physical mechanism for hot carrier injection (HCI) induced trap generation and degradation in bulk FinFETs is investigated and verified with both experiment and simulation evidence. HCI degradation is mainly caused by interface states generated by drain avalanche hot carrier injection. From this model, impact ionization intensity, location and trapping immunity are proposed as key parameters to modulate HCI degradation. HCI reliability in I/O FinFETs is severely degraded with respect to planar FETs because of the enhanced capability of the gate to control the channel potential profiles increasing the intensity of the lateral E-field in comparison with planar devices. Based on this FinFET HCI mechanism, we have successfully optimized source/drain junction process to achieve reliable HCI characteristics for 14nm and 10nm FinFET devices.
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