Abstract
The reliability of integrated circuits under advanced process nodes is facing more severe challenges. Single-event transients (SET) are an important cause of soft errors in space applications. The SET caused by heavy ions in the 28 nm bulk silicon inverter chains was studied. A test chip with good symmetry layout design was fabricated based on the 28 nm process, and the chip was struck by using 5 kinds of heavy ions with different linear energy transfer (LET) values on heavy-ion accelerator. The research results show that in advanced technology, smaller sensitive volume makes SET cross-section measured at 28 nm smaller than 65 nm by an order of magnitude, the lower critical charge required to generate SET will increase the reliability threat of low-energy ions to the circuit, and high-energy ions are more likely to cause single-event multiple transient (SEMT), which cannot be ignored in practical circuits. The transients pulse width data can be used as a reference for SET modeling in complex circuits.
Highlights
The generation of soft errors caused by radiation-induced single-event transients (SET) is a significant reliability challenge in modern complementary metal-oxide-semiconductor (CMOS) logic, both in space applications and in terrestrial applications [1,2,3]
It has been reported that SET are the main cause of soft errors in space applications [6,7], and charge sharing may even affect multiple nodes and cause single-event multiple transients (SEMT) [8,9,10]
When the debug mode is enabled, the square pulse generated by the debug circuit is captured by the measurement circuit, so the pulse width generated in each debug circuit is recorded, and the measured pulse width is found to be constant after multiple experimental measurements
Summary
The generation of soft errors caused by radiation-induced single-event transients (SET) is a significant reliability challenge in modern complementary metal-oxide-semiconductor (CMOS) logic, both in space applications and in terrestrial applications [1,2,3]. It has been reported that SET are the main cause of soft errors in space applications [6,7], and charge sharing may even affect multiple nodes and cause single-event multiple transients (SEMT) [8,9,10]. These problems are already common in combinatorial logic circuits. The results measured at the 0.25, 0.18, and 0.13 μm process nodes show that the effect of voltage variation on the relationship between the SET pulse width and the cross section cannot be ignored [11]. Experiments with heavy ions on 130 nm and 90 nm chips have shown that the Linear energy transfer (LET) threshold for generating
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