Abstract
This paper presents three different structures of SOI-TFET. Using silicon and germanium as source material and placing a high-doped [Formula: see text] layer at the source/ channel interface, these different structures are formed. All of the architectures have a [Formula: see text]-shaped channel and the thickness of the source and drain regions are less than the channel thickness. At first, the impact of gate-to-source overlap on the DC performance metrics of these tunneling field-effect transistor (TFETs) is investigated by 2D numerical simulations. The results indicate that the gate overlap on the source can improve the performance of the devices with [Formula: see text]-shaped channels. Then, the proposed structures have been analyzed in terms of AC analysis when the overlap of the gate on the source is 50%. It is confirmed that the Ge-source [Formula: see text]-channel SOI-TFET with gate-source overlap shows better results overall in comparison to the other structures. This device provides [Formula: see text] S, [Formula: see text], [Formula: see text] Hz and shows strong potential to design fast electronic switches.
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